1. Field of the Invention
The present invention relates to a CMOS image sensor and method for manufacturing the same, and more particularly to a CMOS image sensor and a method for manufacturing the same, in which the interface between active regions and field regions of the CMOS image sensor are not damaged by ion implantation.
2. Description of the Prior Art
In general, an image sensor is a semiconductor device for converting an optical image into electrical signals, and is generally divided into a CCD (Charge Coupled Device) and a CMOS (Complementary Metal Oxide Semiconductor) image sensor.
A CCD is a device in which charge carriers are stored and transferred to MOS capacitors and each MOS capacitor is disposed close to each other, while a CMOS image sensor is a device employing a switching mode of forming MOS transistors as many as the number of pixels using CMOS technology, and makes use of controlling and signal processing circuits as a peripheral circuit to detect light outputs using the MOS transistors.
A CCD has various disadvantages, such as complicated drive mode, high power consumption, difficulty of realization of a signal processing circuit in a chip for the CCD due to undesirably large number of mask processes, and so on. In order to overcome these disadvantages, studies have been conducted in the development of CMOS image sensors using sub-micron CMOS manufacturing technology.
A CMOS image sensor senses an image using a photodiode and a MOS transistor in each pixel for detecting light signals in a switching mode. As mentioned above, because the CMOS image sensor makes use of CMOS manufacturing technologies, the CMOS image sensor has a low power consumption as well as a simple manufacturing process, which requires only about 20 masks, compared to 30 to 40 masks in the CCD manufacturing process. As a result, the CMOS image sensor can have a signal processing circuit integrated into a single chip, resulting in a compact product, which is suitable for various applications.
Hereinafter, a description will be made regarding a construction of the CMOS image sensor. FIGS. 1 and 2 are a circuit diagram and a layout diagram, respectively, showing a structure of a unit pixel of a conventional CMOS image sensor. Although the number of transistors in a CMOS image sensor may be three or more, for illustration purposes, only a CMOS image sensor with three transistors will be described.
As shown in FIGS. 1 and 2, a unit pixel 100 of the CMOS image sensor comprises a photodiode 110 as a means for sensing light and three NMOS (N-channel Metal Oxide Semiconductor) transistors. Among the three transistors, one is a reset transistor (Rx) 120, which functions not only to transfer optical charges generated from the photodiode 110 but also to discharge charges so as to detect signals, another is a buffer transistor (Bx) 130, which functions as a source follower, and the other is a select transistor (Sx) 140, which performs switching and addressing functions.
Meanwhile, in the unit pixel 100 of the CMOS image sensor, the photodiode 110 is designed to function as a source of the reset transistor (Rx) 120 in order to facilitate transfer of the charges. To this end, in the course of manufacturing the unit pixel 100 of the image sensor, a process of implanting low- or high-concentration dopant ions into a portion of a semiconductor substrate including a part of the photodiode 110 is used, as shown in FIG. 2. The manufacturing process will be described with reference to a cross-section taken along line A–A′ of FIG. 2. In FIG. 2, a dotted line indicates a region 150 into which high-concentration or low-concentration dopant ions are implanted, while a solid line indicates an active region 160.
First, as shown in FIG. 3a, a gate insulating layer 122 and a gate electrode 123 are sequentially formed on a p-type semiconductor substrate 101, on which an element isolating layer, or a field region, 121 is completely formed. A low-concentration n-type dopant region 103 of the photodiode 110 is formed in an active region defined by the element isolating layer 121. Then, a p-type dopant region 105 is formed in the low-concentration n-type dopant region 103. Thereby, the photodiode 110 is finished.
As shown in FIG. 3b, a photoresist layer 124 is applied on the substrate 101, and is then selectively patterned to expose the substrate 101 including a part of the photodiode 110. Subsequently, using the patterned photoresist layer 124, the gate insulating layer 122, and the gate electrode 123 as a mask, low-concentration n-type dopant ions are implanted into the substrate 101, thereby forming lightly doped drain (LDD) structures 115 and 116. The low-concentration n-type dopant ions implanted into the part of the photodiode 110 allows the photodiode to function as a source of the reset transistor Rx as mentioned above.
Further, as shown in FIG. 3c, a spacer 126 is formed on the side walls of the gate electrode 123. A photoresist pattern 127 is formed on the substrate 101, wherein the photoresist pattern 127 has the same pattern as the patterned photoresist layer 124 of FIG. 3b. Then, using the photoresist pattern 127, the gate insulating layer 122, the gate electrode 123, and the spacer 126 as a mask, high-concentration n-type dopant ions are implanted into the substrate 101 to form a source region 128 and a drain region 129.
FIG. 3d shows a cross-sectional view taken along line B–B′ of FIG. 2. As shown in FIG. 3d, when implanting the low-concentration n-type dopant ions for the LDD structures 115 and 116 and the high-concentration n-type dopant ions for forming the source/drain regions 128 and 129, the respective photoresist patterns 124 and 127 used as an ion implantation mask are designed to expose a part of the element isolating layer 121.
According to the conventional method for manufacturing the CMOS image sensor, to improve charge movement characteristics, dopant ions for the LDD structures 115 and 116 and the source/drain regions 128 and 129 are implanted into a part of the photodiode 110 so as to allow the photodiode 110 to function as a source of the reset transistor Rx of the CMOS image sensor. However, as shown in FIG. 3d, the dopant ions are implanted into the active region as well as part of the element isolating layer 121 or the field region, and defects caused by ion implantation are generated at the interface between the active region and the field region.
These defects caused by ion implantation generate electrons or holes and provide recombination centers for the electrons and holes, thus increasing a leakage current of the photodiode. In other words, a dark current, i.e., a current due to the movement of electrons to a floating diffusion region in the photodiode while no light is present, is increased. The dark current is mainly a result of various defects distributed around the silicon surface, at the interface between the element isolating layer 121 and the p-type dopant region 105, as indicated by reference numerals 121a in FIG. 3d, at the interface between the element isolating layer 121 and the low-concentration dopant region 103, at the interface between the p-type dopant region 105 and the low-concentration dopant region 103, in the p-type dopant region 105, or in the low-concentration dopant region 103, or from a dangling bond. The dark current deteriorates low illumination characteristics of the CMOS image sensor.
Pending Korean Patent Publication Nos. 2001-61349, 2001-61353, and 2003-52639 disclose a method for reducing dark current of CMOS image sensor, which, however, does not present a solution to restrict an increase of dark current by preventing impurities from being ion-implanted into the boundary portion between an isolation layer and an active region for a photodiode.
Also, U.S. Pat. No. 6,462,365, entitled “active pixel having reduced dark current in a CMOS image sensor”, discloses a method for restricting an increase of dark current due to a dangling bond at the surface of a photodiode, in which an isolation layer and a transfer gate as a passivation layer are formed on the surface of the photodiode. However, the method does not present a solution to restrict an increase of dark current by preventing impurities from being ion-implanted into the boundary portion between the isolation layer and the active region for the photodiode.